Abstract:
A method and apparatus for making pad structures suitable for wirebonding and, optionally, also for solder-ball connections. Some embodiments include an electronics chip having a substrate with circuitry, a compliant electrically insulating layer deposited on at least a portion of the substrate, and an electrical connection pad, the pad having an electrical connection to the circuitry through an aperture in the insulating layer and a peripheral bonding zone region extending over the insulating layer. In some embodiments, the bonding zone is exclusively over the insulating layer outside of the aperture. In some embodiments, the pads are suitable for both solder-ball and wirebond connections. By making a wirebond connection to an area of a pad over the compliant insulating layer, the underlying circuitry is protected from ultrasonic energy of the bonding process.