An integrated circuit package such as a BGA package for use with an integrated circuit chip. The integrated circuit package has substrate with a cavity that exposes a lower conductive level in the package so that connections between the integrated circuit chip and the lower conductive level may be formed to reduce the through holes formed in the substrate. As a result, additional signal line interconnections may be included in the substrate circuit package and/or the size of the integrated circuit chip may be decreased. Each of these may be implemented for enhanced electrical performance. The multiple wire bonding tiers in the substrate may also provide greater wire separation that eases wire bonding and subsequent encapsulation processes.
An integrated circuit package where the integrated circuit chip is mounted on a conductive slug and electrically coupled to the slug. Besides acting as a heat spreader, the conductive slug may also function as a ground plane. This reduces the need for additional conductive layers and plated through hole connections for forming connections to, for example, ground. As a result, the conductive paths in the internal ground planes are not necessarily cut off by the plated through holes used for interconnecting ground connections thus avoiding some of the electrical performance degradation suffered by prior techniques. In addition, the invention allows more signals to be added and/or the size of the integrated circuit chip to be reduced to enhance electrical performance. It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.
Method Of Manufacturing A Printed Wiring Board Having A Discontinuous Plating Layer
The present invention provides a method of plating an electrical contact on an integrated circuit (IC) substrate manufactured from a rigid double-sided or multi-layered printed wiring board core with dielectric layers on both sides of the core. The method may include forming electrically connected plating layers on first and second opposing sides of a substrate and electroplating a contact layer over each of the plating layers using the plating layers. The method further includes removing a portion of the plating layers from the first and second opposing sides while leaving the plating layers under the contact layer.
Method Of Manufacturing An Integrated Circuit Package
A method of manufacturing an integrated circuit package such as a BGA package for use with an integrated circuit chip. The integrated circuit package has a substrate formed with a cavity that exposes a lower conductive level in the package so that connections between the integrated circuit chip and the lower conductive level may be formed to reduce the through holes formed in the substrate. As a result, additional signal line interconnections may be included in the substrate circuit package and/or the size of the integrated circuit chip may be decreased. Each of these may be implemented for enhanced electrical performance. The multiple wire bonding tiers in the substrate may also provide greater wire separation that eases wire bonding and subsequent encapsulation processes.
Flexible Circuit Substrate For Flip-Chip-On-Flex Applications
A circuit substrate for attachment to an integrated circuit chip comprises an electrical trace, a mounting pad and a dielectric layer. The mounting pad has a first surface, one or more sidewalls and a second surface. The first surface is attached to the electrical trace. The dielectric layer substantially covers the one or more sidewalls of the mounting pad and has an uppermost surface that is substantially coplanar with the second surface of the mounting pad.
Method For Electrical Interconnection Between Printed Wiring Board Layers Using Through Holes With Solid Core Conductive Material
Charles Cohn - Wayne NJ, US Jeffrey M Klemovage - Whitehall PA, US
Assignee:
Agere Systems LLC - Wilmington DE
International Classification:
H05K 3/02 H05K 3/10
US Classification:
29846, 29829, 2281805, 228254
Abstract:
The present invention provides method of manufacture for a printed wiring board. The printed wiring board constructed according to the teachings of the present invention includes a printed wiring board dielectric layer having conductive foils located on at least two sides thereof. The printed wiring board further includes a solid core conductive material interconnecting the conductive foils.
Method For Electrical Interconnection Between Printed Wiring Board Layers Using Through Holes With Solid Core Conductive Material
Charles Cohn - Wayne NJ, US Jeffrey Klemovage - Whitehall PA, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
H05K001/09 H05K001/11
US Classification:
174255000, 174262000, 174257000
Abstract:
The present invention provides a printed wiring board and a method of manufacture therefor. The printed wiring board constructed according to the teachings of the present invention includes a printed wiring board dielectric layer having conductive foils located on at least two sides thereof. The printed wiring board further includes a solid core conductive material interconnecting the conductive foils.
This invention is a simple and effective process of producing a plastic pin grid array package having an encapsulated device and a heat sink forming a unitary component of a main planar body of the package. The process includes fabrication of a laminated planar main body having outer plastic sheets provided with metallizations, a metal sheet of high thermal conductivity, and plastic sheets positioned intermediate the outer plastic sheets and the metal sheet, the metal sheet having clearance holes filled with plugs of the material of the intermediate plastic sheets, a plurality of plated-through holes (PTHs) formed in the main body and terminal pins secured in the PTHs. Some of the PTHs contacting the metal sheet and some passing through the plugs in the clearance holes out of contact with the metal sheet. The device, such as an integrated circuit chip, mounted in a recessed cavity in the main body, is in contact with the metal heat-sink. In this manner heat is conducted away from the device by the heat sink and dissipated through the back of the package and those of the terminal pins which are in PTHs contacting the heat sink.
Name / Title
Company / Classification
Phones & Addresses
Charles D. Cohn Medical Doctor
EAGLE HOSPITAL PHYSICIANS LLC Administrative Office of Medical and Health Services Provider · Medical Doctor's Office General Hospital · Offices & Clinics of Medical Doctors · General Hospital Medical Doctor's Office · Management Services
16000 Dallas Pkwy STE 450, Dallas, TX 75248 5901 Peachtree Dunwoody Rd STE C350, Atlanta, GA 30328 5901C Peachtree Dunwoody Rd, Atlanta, GA 30328 5901-C Peachtree Dunwoody Rd SUITE 350, Atlanta, GA 30328 6783970060, 2149960800, 2149960750
Charles Cohn President
Midtown Group Inc Business Consulting Services · Business Services
15 Barone Rd, Town Center, NJ 07052
Resumes
A Business And Marketing Leader Who Turns Vision Into Reality
N. Cayuga Street Frontenac, KS Nov 2012 to Mar 2013 Electrical InstallerCONRAD MACHINE Pittsburg, KS Jul 2011 to Nov 2012 Horizontal Saw OperatorSMOKY MOUNTAIN HARLEY-DAVIDSON
May 2010 to Aug 2010 Service Technician (Intern)SERCO INC San Diego, CA Jul 2003 to Jul 2008 Electronic Maintenance Technician IIRCI TRANSPORTATION San Diego, CA Feb 2003 to Jun 2003 DriverHOBBS CORPORATION Springfield, IL Sep 2002 to Jan 2003 AssemblerGroom
Sep 2001 to Sep 2002 Assistant TrainerRESOURCE CONSULTANTS, INC San Diego, CA Mar 2000 to Mar 2001 Electronic Maintenance Technician IIMANPOWER/RAYTHEON SYSTEMS COMPANY San Diego, CA Dec 1999 to Mar 2000 Mechanical AssemblerTOOL DEPOT San Diego, CA Nov 1997 to Dec 1999 Warehouseman/SalespersonDOUG ACKERMAN/JOE MULLENS STABLES Del Mar, CA Oct 1995 to Jul 1997GORDITO'S MEXICAN RESTAURANT Fairfield, CA Jul 1995 to Oct 1995 SalespersonPINNACLE BUILDERS Fairfield, CA Dec 1994 to Jun 1995 BartenderRANCHO SOLANO COUNTRY CLUB Fairfield, CA Sep 1993 to Dec 1994 Construction WorkerUNITED STATES AIR FORCE Travis AFB, CA Mar 1993 to Aug 1993 BartenderAvionics Guidance & Control Specialist Apr 1985 to Dec 1992
Education:
FORT SCOTT COMMUNITY COLLEGE HARLEY Frontenac, KS 2010 Associate of Applied ScienceSOLANO COMMUNITY COLLEGE Fairfield, CA 1997 General EducationCOMMUNITY COLLEGE OF THE AIR FORCE 1985 to 1990 Electrical EngineeringNORTHERN ILLINOIS UNIVERSITY DeKalb, IL 1980 to 1981 General Education