Anant S Deval

US Patent:

7414383, Aug 19, 2008

Filed:

May 12, 2006

Appl. No.:

11/434308

Inventors:

Edward Allyn Burton - Hillsboro OR, US
Robert J. Greiner - Beaverton OR, US
Anant S. Deval - Beaverton OR, US
Douglas Robert Huard - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G05F 1/59

US Classification:

323271, 323283, 323285

Abstract:

While firing a number of phases of a multi-phase switching voltage regulator in a sequence, a determination is made as to which one of the phases has the lowest phase current. Then, the next phase, to be fired in the sequence, is selected as the one that has been determined to have the lowest phase current. Other embodiments are also described and claimed.

US Patent:

7449966, Nov 11, 2008

Filed:

May 9, 2006

Appl. No.:

11/431256

Inventors:

Edward A. Burton - Hillsboro OR, US
Robert J. Greiner - Beaverton OR, US
Anant S. Deval - Beaverton OR, US
Douglas R. Huard - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H03B 27/00

US Classification:

331 57, 331 74, 331185, 324123, 374170

Abstract:

A method and an apparatus to sense supply voltage have been disclosed. In one embodiment, the apparatus includes a resistor having a first end and a second end, the first end coupled to a voltage supply and a ring oscillator sensor coupled between the second end of the resistor and ground, the ring oscillator sensor having an output coupled to a computational element. Other embodiments have been claimed and described.

US Patent:

7466176, Dec 16, 2008

Filed:

May 12, 2006

Appl. No.:

11/432868

Inventors:

Doug Huard - Portland OR, US
Robert Greiner - Beaverton OR, US
Anant Deval - Beaverton OR, US
Edward Burton - Hillsboro OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H03K 3/017

US Classification:

327172, 327170

Abstract:

A voltage regulator is described for microelectronic devices using dual edge pulse width modulated control signal. In one example a first digital duty cycle value is received from a voltage controller and a pulse width modulated waveform is generated in response to the first duty cycle value, the waveform comprising a plurality of pulses with a modulated width. The waveform is applied to a voltage generator to generate a supply of power at a voltage determined by the duty cycle of the waveform. A second digital duty cycle value is received from the controller, and the leading edge of a subsequent pulse of the waveform is advanced if the second digital duty cycle value is greater than the first digital duty cycle. The trailing edge of the subsequent pulse of the waveform is advanced if the second digital duty cycle value is less than the first digital duty cycle value.

US Patent:

7506184, Mar 17, 2009

Filed:

May 9, 2006

Appl. No.:

11/431739

Inventors:

Edward Burton - Hillsboro OR, US
Robert Greiner - Beaverton OR, US
Anant Deval - Beaverton OR, US
Doug Huard - Portland OR, US
Dave Perchlik - Tacoma WA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/00
H02J 3/32
G05F 1/00

US Classification:

713300, 307 45, 323271

Abstract:

A method and apparatus for current detection for microelectronic devices using source-switched sensors. An embodiment of a current detector for a microelectronic device includes a first voltage sensor and a second voltage sensor. The first voltage sensor is to measure a first voltage of the microelectronic device during a first time period and a second voltage of the microelectronic device during a second time period. The second voltage sensor is to measure the second voltage during the first time period and the first voltage during the second time period. A voltage value is equal to the sum of the first voltage measured by the first sensor plus the first voltage measured by the second sensor, minus the sum of the second voltage measured by the first sensor plus the second voltage measured by the second sensor. Other embodiments are also described and claimed.

US Patent:

7642764, Jan 5, 2010

Filed:

May 3, 2006

Appl. No.:

11/418326

Inventors:

Edward Allyn Burton - Hillsboro OR, US
Robert J. Greiner - Beaverton OR, US
Anant S. Deval - Beaverton OR, US
Douglas Robert Huard - Portland OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G05F 1/62

US Classification:

323283, 713300, 323272

Abstract:

A voltage regulator that is to change its DC output voltage as a primary function of a dynamic portion of integrated circuit (IC) supply current, wherein the voltage regulator's voltage dependence on at least one of a) IC supply leakage current, b) IC supply fixed dock current, or c) load current external to the IC, is a secondary and weaker function. Other embodiments are also described and claimed.

US Patent:

7685441, Mar 23, 2010

Filed:

May 12, 2006

Appl. No.:

11/434451

Inventors:

Edward A. Burton - Hillsboro OR, US
Robert J. Greiner - Beaverton OR, US
Anant S. Deval - Beaverton OR, US
Douglas R. Huard - Portland OR, US
Jeremy J. Shrall - Portland OR, US
Arun R. Ramadorai - Beaverton OR, US
Benson D. Inkley - North Plains OR, US
Martin M. Chang - Beaverton OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/00

US Classification:

713300, 713310, 361 90, 365 63

Abstract:

Methods and apparatuses provide voltage regulation for a processor. Control or configuration parameters for a voltage regulator (VR) are provided digitally over a configuration bus to a VR controller. The parameters may be provided directly from a storage element, or via a processing element or processor core. Based in whole or in part on the parameters, the VR controller provides an output control signal to affect a power output from a power converter to the processing element. In one embodiment, the VR controller is integrated onto the same IC as the processing element.

US Patent:

7949887, May 24, 2011

Filed:

Nov 1, 2006

Appl. No.:

11/555609

Inventors:

Stephen H. Gunther - Beaverton OR, US
Edward A. Burton - Portland OR, US
Anant Deval - Beaverton OR, US
Stephan Jourdan - Portland OR, US
Robert Greiner - Beaverton OR, US
Michael Cornaby - Hillsboro OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/32
G06F 1/26

US Classification:

713320, 713300

Abstract:

Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores.

US Patent:

8037326, Oct 11, 2011

Filed:

Feb 2, 2010

Appl. No.:

12/698729

Inventors:

Edward A. Burton - Hillsboro OR, US
Robert J. Greiner - Beaverton OR, US
Anant S. Deval - Beaverton OR, US
Douglas R. Huard - Portland OR, US
Jeremy J. Shrall - Portland OR, US
Arun R. Ramadorai - Beaverton OR, US
Benson D. Inkley - North Plains OR, US
Martin M. Chang - Beaverton OR, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 1/00
G06F 1/10

US Classification:

713300, 713340, 327538, 327540

Abstract:

Methods and apparatuses provide voltage regulation for a processor. Control or configuration parameters for a voltage regulator (VR) are provided digitally over a configuration bus to a VR controller. The parameters may be provided directly from a storage element, or via a processing element or processor core. Based in whole or in part on the parameters, the VR controller provides an output control signal to affect a power output from a power converter to the processing element. In one embodiment, the VR controller is integrated onto the same IC as the processing element.