Stephen Allott

US Patent:

6420934, Jul 16, 2002

Filed:

Aug 24, 2000

Appl. No.:

09/645475

Inventors:

Iain C. Butler - Santa Cruz CA
Stephen Allott - Scotts Valley CA

Assignee:

TelenComm, Inc. - Santa Clara CA

International Classification:

H03G 310

US Classification:

330279, 330129, 4552341, 4552451

Abstract:

An automatic gain control circuit for amplifying an input signal of varying strength and having a fast attack mode of operation and a tracking mode of operation includes a gain controlled amplifier for receiving the input signal and producing an amplified analog output signal, a receive signal strength indicator (RSSI) circuit for receiving the amplified analog signal and producing an output voltage indicative of strength of the signal, and decision logic circuitry responsive to the output voltage from the RSSI circuit for controlling gain to the gain controlled amplifier. A plurality of comparators is provided for comparing the output voltage from the RSSI circuit to threshold voltages in generating output signals indicative of the voltage comparisons which can indicate the RSSI output voltage being very low, low, high, or very high as inputs to the decision logic circuit. The decision logic circuitry can then provide a fast acquisition mode of operation or a tracking mode of operation depending on the output signals from the plurality of comparators. In preferred embodiments, the gain controlled amplifier can comprise a plurality of cascaded gain controlled amplifier circuits with the gains of the cascaded gain control amplifier circuits being controlled by the decision logic circuitry.

US Patent:

6747521, Jun 8, 2004

Filed:

Jul 26, 2002

Appl. No.:

10/206256

Inventors:

Stephen Allott - Scotts Valley CA

Assignee:

Zeevo, Inc. - San Jose CA

International Classification:

H03L 708

US Classification:

331175, 331 17, 331176

Abstract:

An analog memory cell that may be incorporated into a low power oscillator is provided. The analog memory cell stores an analog voltage as a digital signal and converts the digital signal back to an analog voltage to allow continued generation of an accurate constant output voltage regardless of temperature-dependent leakage currents associated with parasitic diodes and non-ideal devices. The accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation. Incorporation of the analog memory cell in the low power oscillator is fully implementable in a CMOS process.

US Patent:

6750715, Jun 15, 2004

Filed:

Apr 16, 2001

Appl. No.:

09/836624

Inventors:

Stephen Allott - Scotts Valley CA
Iain Butler - Aptos CA

Assignee:

Zeevo, Inc. - Santa Clara CA

International Classification:

H03F 345

US Classification:

330258, 330259, 330261, 330296, 327307, 327346

Abstract:

Methods and apparatus of amplifying signals. One method includes receiving a variable power supply, generating a variable bias current, and applying the bias current to a load such that an average output voltage is generated. The method further includes receiving an input signal, generating a current proportional to the input signal, and subtracting the current from the variable bias current. As the variable power supply changes value by a first amount, the variable bias current is varied such that the average output voltage varies by the first amount.

US Patent:

6791374, Sep 14, 2004

Filed:

Jul 2, 2002

Appl. No.:

10/190129

Inventors:

Stephen Allott - Scotts Valley CA

Assignee:

Zeevo, Inc. - Santa Clara CA

International Classification:

G11C 2702

US Classification:

327 94, 327309, 341122

Abstract:

A hold cell implementing a closed-loop, common mode negative feedback method is provided. The hold cell enables generation of an accurate constant output voltage regardless of temperature-dependent leakage currents associated with parasitic diodes and non-ideal devices. The accurate constant output voltage provided by the hold cell is used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal is used to maintain long-term timing accuracy in host devices during sleep modes of operation. Incorporation of the hold cell in a low power oscillator is fully implementable in a CMOS process.

US Patent:

7012487, Mar 14, 2006

Filed:

Apr 18, 2001

Appl. No.:

09/837897

Inventors:

Stephen Allott - Scotts Valley CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03H 11/00

US Classification:

333214, 333215, 331132

Abstract:

A system on chip such as a radio receiver has reduced suceptibility to voltages in the bulk silicon by using gyrator elements in the receiver with each gyrator element including a plurality of current sources interconnected to provide output transconductance voltages, and a variable load for the current sources including first and second load resistors each serially connected with one other plurality of current sources. A variable resistance interconnects nodes of the load resistors with the variable resistance comprising a pair of native MOS transistors having low threshold voltages. In a preferred embodiment the first and second load resistors comprise first and second MOS transistors with the pair of native transistors serially connected between source elements of the first and second MOS transistors.

US Patent:

7015545, Mar 21, 2006

Filed:

Mar 18, 2002

Appl. No.:

10/101405

Inventors:

Thomas G. McKay - Felton CA, US
Stephen Allott - Scotts Valley CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H01L 29/76

US Classification:

257341, 297369, 297373, 297383, 297343, 297288

Abstract:

An RF MOS transistor having improved AC output conductance and AC output capacitance includes parallel interdigitated source and drain regions separated by channel regions and overlying gates. Grounded tap regions contacting an underlying well are placed contiguous to source regions and reduce distributed backgate resistance, lower backgate channel modulation, and lower output conductance.

US Patent:

7301398, Nov 27, 2007

Filed:

Mar 20, 2006

Appl. No.:

11/384459

Inventors:

Stephen Allott - Scotts Valley CA, US
Mark Alexander John Moffat - Santa Cruz CA, US

Assignee:

RF Micro Devices, Inc. - Greensboro NC

International Classification:

H03F 3/45

US Classification:

330253, 330254

Abstract:

The present invention is a differential transconductance amplifier circuit that includes matched cross-coupled transconductance elements connected such that the differential gain of the amplifier is determined by only passive elements. By virtually eliminating the effects of active elements on the amplifier gain, the amplifier operates in a very linear manner over its entire operating range. Power consumption, amplifier noise level, and dynamic range can be optimized with appropriate selection of the passive elements that determine amplifier gain.

US Patent:

7522900, Apr 21, 2009

Filed:

Mar 20, 2001

Appl. No.:

09/813420

Inventors:

Stephen Allott - Scotts Valley CA, US
Louis Pandula - Sunnyvale CA, US
Edwin X. Li - San Jose CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04B 1/10

US Classification:

455304, 455296

Abstract:

A method and apparatus for determining a delay vector from inputs of in-phase and quadrature phase low pass filters to an output of the demodulator of a dual mixer radio receiver and from such delay measurement computing and providing DC offset correction to said receiver.

Author:

Stephen Allott

ISBN #:

0713516003