Sami R Hyvonen from 14705 SW Forest Dr, Beaverton, OR 97007, age 50

High-Speed Amplitude Detector With A Digital Output
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US Patent:

7696791, Apr 13, 2010
Filed:

Dec 31, 2007
Appl. No.:

11/968143
Inventors:

Sami Hyvonen - Beaverton OR, US
Assignee:

Intel Corporation - Santa Clara CA
International Classification:

H03K 5/22
US Classification:

327 71, 327 65
Abstract:

An amplitude detection circuit using a sinusoidal input signal inputs to produce a digital output (a one or zero) is described. The circuit uses an input field effect transistor (FET) with a gate load coupled to a gate of the input FET. A drain load may be coupled to a drain of the input FET. A source load may be coupled to a source of the input FET. A controllable variable current generator provides a current to the source of the input FET, biasing the source of the input FET to a reference voltage. An input signal conductor may be coupled to the gate of the input FET. Other embodiments are described.

Lc-Type Vco
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US Patent:

20080278249, Nov 13, 2008
Filed:

May 9, 2007
Appl. No.:

11/746403
Inventors:

Sami Hyvonen - Beaverton OR, US
International Classification:

H03B 7/06
H03J 3/20
US Classification:

331117 R
Abstract:

Disclosed herein are embodiments of an LC-type VCO with multiple operational frequency bands having reasonably similar frequency vs. control signal slopes.

Multiple-Phase, Differential Sampling And Steering
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US Patent:

20090322403, Dec 31, 2009
Filed:

Jun 30, 2008
Appl. No.:

12/164951
Inventors:

Sami Hyvonen - Beaverton OR, US
Assignee:

Intel Corporation - Santa Clara CA
International Classification:

G06G 7/18
US Classification:

327335
Abstract:

Methods and systems to controllably steer multiple phases of a differential signal, including to generate a differential current in response to a differential voltage, to controllably steer the differential current between multiple output circuits in response to corresponding control signals, which may be out of phase with respect to one another, and to generate multiple corresponding outputs corresponding to the multiple steered phases of the current. A differential input circuit and a current steering circuit may be common to multiple output circuits, and a common offset compensation may be provided to compensate for a substantial portion of offset associated with the multiple outputs.

Electrostatic Discharge Clamp Compatible With A Fast Ramping Supply
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US Patent:

20130308234, Nov 21, 2013
Filed:

Mar 22, 2012
Appl. No.:

13/996098
Inventors:

Sami Hyvonen - Beaverton OR, US
Chinmay P. Joshi - Portland OR, US
Timothy J. Maloney - Palo Alto CA, US
International Classification:

H02H 3/20
US Classification:

361 56
Abstract:

Described herein is an apparatus and system of an electrostatic discharge circuit. The apparatus comprises: a clamp transistor with a terminal coupled to a node with a power supply; and a detector to determine when the power supply crosses a first threshold, the detector to generate a trigger signal to cause the clamp transistor to remain off when the power supply on the node is below the first threshold.

Macro-Transistor Devices
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US Patent:

20140008732, Jan 9, 2014
Filed:

Nov 14, 2011
Appl. No.:

13/976081
Inventors:

Sami Hyvonen - Beaverton OR, US
Jad B. Rizk - Portland OR, US
Frank O'Mahony - Portland OR, US
International Classification:

H01L 27/088
US Classification:

257390
Abstract:

Macro-transistor structures are disclosed. In some cases, the macro-transistor structures have the same number of terminals and properties similar to long-channel transistors, but are suitable for analog circuits in deep submicron technologies deep-submicron process nodes. The macro-transistor structures can be implemented, for instance, with a plurality of transistors constructed and arranged in series, and with their gates tied together, generally referred to herein as a transistor stack. One or more of the serial transistors within the stack can be implemented with a plurality of parallel transistors and/or can have a threshold voltage different that is different from the threshold voltages of other transistors in the stack. Alternatively, or in addition, one or more of the serial transistors within the macro-transistor can be statically or dynamically controlled to tune the performance characteristics of the macro-transistor. The macro-transistors can be used in numerous circuits, such as varactors, VCOs, PLLs, and tunable circuits.

High Speed Receiver With One-Hot Decision Feedback Equalizer
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US Patent:

20160277219, Sep 22, 2016
Filed:

Mar 17, 2015
Appl. No.:

14/660799
Inventors:

- Santa Clara CA, US
Sami Hyvonen - Beaverton OR, US
Tawfiq Musah - Portland OR, US
Bryan K. Casper - Portland OR, US
International Classification:

H04L 25/03
H04L 7/033
Abstract:

Described is an apparatus which comprises: an amplifier; a first set of samplers to sample data output from the amplifier according to a clock signal, the set of samplers to generate an output; and a converter to convert the output of the first set of samplers to 1 -hot encoded data.

Clock Calibration Using Asynchronous Digital Sampling
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US Patent:

20160241249, Aug 18, 2016
Filed:

Nov 19, 2013
Appl. No.:

15/025226
Inventors:

- Santa Clara CA, US
Mozhgan MANSURI - Portland OR, US
Sami HYVONEN - Beaverton OR, US
Bryan K. CASPER - Portland OR, US
Frank O'MAHONY - Portland OR, US
International Classification:

H03L 7/00
H04B 1/04
H03K 5/156
H04L 25/03
Abstract:

Described is an apparatus which comprises: an asynchronous clock generator to generate an asynchronous clock signal; a digital sampler for sampling a signal using the asynchronous clock signal; a duty cycle corrector (DCC) to receive a differential input clock and to generate a differential output clock, wherein the digital sampler to sample at least one of an output clock from the differential output clock; and a counter to count output of the digital sampler and to provide a control to the DCC to adjust duty cycle of the differential output clock.

Sami R Hyvonen