Ranadeep Bhowmick

US Patent:

20230054699, Feb 23, 2023

Filed:

Jan 30, 2021

Appl. No.:

17/793372

Inventors:

- Fremont CA, US
Felix Kozakevich - Sunnyvale CA, US
Bing Ji - Pleasanton CA, US
Ranadeep Bhowmick - San Jose CA, US
John Holland - San Jose CA, US

International Classification:

H01J 37/32

Abstract:

A tunable edge sheath (TES) system includes a coupling ring configured to couple to a bottom surface of an edge ring that surrounds a wafer support area within a plasma processing chamber. The TES system includes an annular-shaped electrode embedded within the coupling ring. The TES system includes a plurality of radiofrequency signal supply pins coupled to the electrode within the coupling ring. Each of the plurality of radiofrequency signal supply pins extends through a corresponding hole formed through a bottom surface of the coupling ring. The TES system includes a plurality of radiofrequency signal filters respectively connected to the plurality of radiofrequency supply pins. Each of the plurality of radiofrequency signal filters is configured to provide a high impedance to radiofrequency signals used to generate a plasma within the plasma processing chamber.

US Patent:

20230059495, Feb 23, 2023

Filed:

Jan 30, 2021

Appl. No.:

17/793366

Inventors:

- Fremont CA, US
Felix Kozakevich - Sunnyvale CA, US
Bing Ji - Pleasanton CA, US
Ranadeep Bhowmick - San Jose CA, US
Kenneth Lucchesi - Newark CA, US
John Holland - San Jose CA, US

International Classification:

H01J 37/32
H01L 21/683

Abstract:

A fixed outer support flange (flange ) is formed to circumscribe an electrode within a plasma processing system. Flange has a vertical portion and a horizontal portion extending radially outward from a lower end of the vertical portion. An articulating outer support flange (flange ) is formed to circumscribe flange Flange has a vertical portion and a horizontal portion extending radially outward from a lower end of the vertical portion. The vertical portion of flange is positioned concentrically outside of the vertical portion of flange Flange is spaced apart from flange and moveable along the vertical portion of flange Each of a plurality of electrically conductive straps has a first end portion connected to flange and a second end portion connected to flange

US Patent:

20230007885, Jan 12, 2023

Filed:

Feb 8, 2021

Appl. No.:

17/801227

Inventors:

- Fremont CA, US
Felix Leib Kozakevich - Sunnyvale CA, US
Ranadeep Bhowmick - San Jose CA, US
Bing Ji - Pleasanton CA, US
John Holland - San Jose CA, US

International Classification:

H01J 37/32

Abstract:

A method for achieving uniformity in an etch rate is described. The method includes receiving a voltage signal from an output of a match, and determining a positive crossing and a negative crossing of the voltage signal for each cycle of the voltage signal. The negative crossing of each cycle is consecutive to the positive crossing of the cycle. The method further includes dividing a time interval of each cycle of the voltage signal into a plurality of bins. For one or more of the plurality of bins associated with the positive crossing and one or more of the plurality of bins associated with the negative crossing, the method includes adjusting a frequency of a radio frequency generator to achieve the uniformity in the etch rate.

US Patent:

20200411289, Dec 31, 2020

Filed:

Jun 26, 2019

Appl. No.:

16/452716

Inventors:

- Andover MA, US
- Fremont CA, US
Mariusz OLDZIEJ - Avon NY, US
Aaron M. BURRY - Ontario NY, US
Jonathan W. SMYKA - Rochester NY, US
Alexei MARAKHTANOV - Albany CA, US
Bing JI - Pleasanton CA, US
Felix Leib KOZAKEVICH - Sunnyvale CA, US
John HOLLAND - San Jose CA, US
Ranadeep BHOWMICK - San Jose CA, US

International Classification:

H01J 37/32

Abstract:

A radio frequency (RF) generator system includes first and second RF power sources, each RF power source applying a respective RF signal and second RF signal to a load. The first RF signal is applied in accordance with the application of the second RF signal. The application of the first RF signal is synchronized to application of the second RF signal. The first RF signal may be amplitude modulated in synchronization with the second RF signal, and the amplitude modulation can include blanking of the first RF signal. A frequency offset may be applied to the first RF signal in synchronization with the second RF signal. A variable actuator associated with the first RF power source may be controlled in accordance with the second RF signal.

US Patent:

20200090948, Mar 19, 2020

Filed:

Nov 21, 2019

Appl. No.:

16/691125

Inventors:

- Fremont CA, US
Nikhil Dole - Union City CA, US
Ranadeep Bhowmick - San Jose CA, US
Eric Hudson - Berkeley CA, US
Felix Leib Kozakevich - Sunnyvale CA, US
John Holland - San Jose CA, US
Alexei Marakhtanov - Albany CA, US
Bradford J. Lyndaker - San Ramon CA, US

International Classification:

H01L 21/311
H01J 37/32

Abstract:

Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch.

US Patent:

20190157039, May 23, 2019

Filed:

Nov 20, 2017

Appl. No.:

15/818590

Inventors:

- Fremont CA, US
Ryan Bise - Campbell CA, US
John Valcore - Fremont CA, US
Eric Hudson - Berkley CA, US
Ranadeep Bhowmick - Fremont CA, US

International Classification:

H01J 37/32
G06F 1/12

Abstract:

A communications system for synchronizing control signals between subsystems coupled to a process module used for processing a substrate. A distributed controller coupled to the subsystems is configured to initiate process steps, each step having a step period. A distributed clock module includes a master clock having a clock speed including clock cycles, each clock cycle having a duration that is pre-correlated to a feedback loop within which synchronized control signals are delivered to and received from the subsystems by the distributed clock module. A predefined number of clock cycles is assigned by the distributed clock module for performing a corresponding number of feedback loops for transitioning between process steps. The predefined number of clock cycles are restricted to a fraction of the step period.