Ramakrishna R Kotla

US Patent:

7921313, Apr 5, 2011

Filed:

Apr 17, 2008

Appl. No.:

12/105206

Inventors:

Soraya Ghiasi - Austin TX, US
Ramakrishna Kotla - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1/26

US Classification:

713300, 713320

Abstract:

A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.

US Patent:

8527769, Sep 3, 2013

Filed:

Feb 1, 2011

Appl. No.:

13/018427

Inventors:

Ramakrishna R. Kotla - Sunnyvale CA, US
Benjamin J. Wester - Ann Arbor MI, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

H04L 9/32

US Classification:

713171

Abstract:

A cryptographically-secure component is used to provide read-undeniability and deletion-verifiability for messaging applications. When a messaging application of a sending node desires to send a message to a messaging application of a receiving node, the sending node requests an encryption key from the receiving node. The cryptographically-secure component of the receiving node generates an encryption key that is bound to a state of the receiving node. The messaging application of the sending node encrypts the message using the encryption key and sends the encrypted message to the messaging application of the receiving node. Because the encryption key used to encrypt the message is bound to the state associated with reading the message by the cryptographically-secure component, if the receiving node desires to decrypt and read the encrypted message, the receiving node may advance its state to the bound state to retrieve the decryption key.

US Patent:

20060168571, Jul 27, 2006

Filed:

Jan 27, 2005

Appl. No.:

11/044607

Inventors:

Soraya Ghiasi - Austin TX, US
Thomas Keller - Austin TX, US
Ramakrishna Kotla - Austin TX, US
Freeman Rawson - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 9/44

US Classification:

717127000

Abstract:

A method, computer program product, and a data processing system for optimizing task throughput in a multi-processor system. A performance metric is calculated based on performance counters measuring characteristics of a task executed at one of a plurality of processor frequencies available in the multi-processor system. The characteristics measured by the performance counters indicate activity in the processor as well as memory activity. A performance metric provides a means using measured data at one available frequency to predict performance at another processor frequency available in the multi-processing system. Performance loss minimization is used to assign a particular task to a particular frequency. Additionally, the present invention provides a mechanism for priority load balancing of tasks in a manner that minimizes cumulative performance loss incurred by execution of all tasks in the system.

US Patent:

20060253715, Nov 9, 2006

Filed:

May 3, 2005

Appl. No.:

11/120899

Inventors:

Soraya Ghiasi - Austin TX, US
Thomas Keller - Austin TX, US
Ramakrishna Kotla - Austin TX, US
Freeman Rawson - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1/00

US Classification:

713300000

Abstract:

A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.

US Patent:

20100242055, Sep 23, 2010

Filed:

Mar 17, 2009

Appl. No.:

12/405817

Inventors:

Marcos K. Aguilera - Mountain View CA, US
Ramakrishna R. Kotla - Sunnyvale CA, US
Yee Jiun Song - Ithaca NY, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 9/44
G06F 13/00

US Classification:

719330

Abstract:

A remote procedure call chain is provided that replaces multiple consecutive remote procedure calls to multiple servers from a client by allowing a client to specify multiple functions to be performed consecutively at multiple servers in a single remote procedure call chain. The remote procedure call chain is executed by a sequence of multiple servers. Each server executes a service function and a chaining function of the remote procedure call chain. The chaining function uses the state of the remote procedure call chain in the sequence of servers to determine the next server to receive the remote procedure call chain, and the service function to be executed by that server. After the last service function is performed, the last server in the sequence of servers sends the results of the executed service functions to the client that originated the remote procedure call chain.

US Patent:

20110225425, Sep 15, 2011

Filed:

Mar 11, 2010

Appl. No.:

12/721576

Inventors:

Ramakrishna R. Kotla - Sunnyvale CA, US
Indrajit Roy - Austin TX, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

H04L 9/32

US Classification:

713175, 713181

Abstract:

A trusted read and write platform provides write-indisputability and read-undeniability for a distributed application. The platform is implemented at each node of the distributed application using a trusted platform module. To provide write-indisputability, the read and write platform of a node may generate a proof that is signed by the platform module and sent with a purportedly written result. The proof is decrypted using a public key associated with the platform module and includes indicators of the process taken by the read and write platform to write the result. To provide read-undeniability, the read and write platform may bind a key to a state of the platform module. A result to be read at the read and write platform is encrypted using the key and can only be decrypted when the read and write platform updates its state to the bound state.

US Patent:

20130332676, Dec 12, 2013

Filed:

Jun 12, 2012

Appl. No.:

13/494017

Inventors:

Ramakrishna R. Kotla - Sunnyvale CA, US
Venugopalan Ramasubramanian - Mountain View CA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 12/08

US Classification:

711129, 711E12046

Abstract:

In a cloud computing environment, a cache and a memory are partitioned into “colors”. The colors of the cache and the memory are allocated to virtual machines independently of one another. In order to provide cache isolation while allocating the memory and cache in different proportions, some of the colors of the memory are allocated to a virtual machine, but the virtual machine is not permitted to directly access these colors. Instead, when a request is received from the virtual machine for a memory page in one of the non-accessible colors, a hypervisor swaps the requested memory page with a memory page with a color that the virtual machine is permitted to access. The virtual machine is then permitted to access the requested memory page at the new color location.

US Patent:

20140101225, Apr 10, 2014

Filed:

Oct 5, 2012

Appl. No.:

13/645511

Inventors:

- Redmond WA, US
Marcos K. Aguilera - Mountain View CA, US
Mahesh Balakrishnan - San Jose CA, US
Ramakrishna R. Kotla - Sunnyvale CA, US
Vijayan Prabhakaran - Sunnyvale CA, US
Douglas Brian Terry - San Carlos CA, US

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06F 15/16

US Classification:

709203

Abstract:

An application programming interface is provided that allows applications to assign multiple service-level agreements to their data transactions. The service-level agreements include latency bounds and consistency guarantees. The applications may assign utility values to each of the service-level agreements. A monitor component monitors the various replica nodes in a cloud storage system for latency and consistency, and when a transaction is received from an application, the monitor determines which of the replica nodes can likely fulfill the transaction in satisfaction of any of the service-level agreements. Where multiple service-level agreements can be satisfied, the replica node that can fulfill the transaction according to the service-level agreement with the greatest utility is selected. The application may be charged for the transaction based on the utility of the service-level agreement that was satisfied.