Miriam G Blatt

US Patent:

6895561, May 17, 2005

Filed:

Dec 7, 2001

Appl. No.:

10/010239

Inventors:

Miriam G. Blatt - Menlo Park CA, US
Poonacha Kongetira - Menlo Park CA, US
David J. Greenhill - Portola Valley CA, US
Vidyasagar Ganesan - Santa Clara CA, US

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F017/50
G06F009/455

US Classification:

716 1, 716 4, 703 14, 703 23

Abstract:

A method for modeling the power behavior of a pipelined processor has been developed. The method uses a power model integrated into a cycle accurate simulator. To create the power model, design blocks of the processor are divided into sub-blocks. Power modeling equations for each sub-block are developed by collaboration between the sub-block circuit designer and the simulator developer, using activity information relevant to the sub-block that is available in the simulator model. Each equation is calculated multiple times with different sets of power parameters to represent varying power conditions. Every simulation cycle, sub-block power is summed to generate full-chip power for multiple power conditions.

US Patent:

7421382, Sep 2, 2008

Filed:

Dec 7, 2001

Appl. No.:

10/010238

Inventors:

Miriam G. Blatt - Menlo Park CA, US
David J. Greenhill - Portola Valley CA, US
Claude R. Gauthier - Fremont CA, US

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 17/50
G06F 9/45

US Classification:

703 13, 716 1, 716 5, 703 14

Abstract:

A method for data analysis of power modeling for a microprocessor has been developed. The method takes multiple values of power data from a power modeling simulator and generates summary data to characterize the power data behavior. Summary data views include results characterizing behavior in a single cycle and behavior across multiple cycles. Data is viewed both at an absolute level to characterize total power and relative to previous levels to characterize power derivatives. Summary data is derived from power generated every cycle when running specific benchmark programs on the power simulator.

US Patent:

56359578, Jun 3, 1997

Filed:

Jun 24, 1996

Appl. No.:

8/669597

Inventors:

Gary F. Feierbach - Belmont CA
Miriam Blatt - Menlo Park CA

Assignee:

Sun Microsystems, Inc. - Mountain View CA

International Classification:

G06F 3033

US Classification:

345163

Abstract:

An apparatus for use with a computer having a display. The computer is programmed to provide an indicia on the display. The apparatus includes a control device adapted to be electrically connected to the computer and having an indicia control element for moving the indicia across the display. At least one foot pedal and at least one electrical connector for electrically connecting the at least one foot pedal to the control device are provided. The at least one foot pedal can be used to click on the indicia on the display. A method for operating the computer with the apparatus is provided.