Marcelo E Montoreano

US Patent:

7970596, Jun 28, 2011

Filed:

Sep 24, 2009

Appl. No.:

12/566616

Inventors:

Stephen L. Bade - Lindon UT, US
Shay Ben-Chorin - Cupertino CA, US
Paul Caamano - San Mateo CA, US
Marcelo E. Montoreano - Santa Cruz CA, US
Ani Taggu - Campbell CA, US
Filip C. Thoen - San Jose CA, US
Dean C. Wills - Corvallis OR, US

Assignee:

Synopsys, Inc. - Mountain View CA

International Classification:

G06F 17/50
G06G 7/62

US Classification:

703 13, 716106, 717124

Abstract:

An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are coupled to simulators of processor cores, preferably instruction set accurate simulators. A software debugger interface permits a software application to be loaded and executed on the virtual embedded system. A virtual test bench may be coupled to the simulation to serve as a human-machine interface. In one embodiment, the IDE is provided as a web-based service for the evaluation, development and procurement phases of an embedded system project. IP components, such as processor cores, may be evaluated using a virtual embedded system. In one embodiment, a virtual embedded system is used as an executable specification for the procurement of a good or service related to an embedded system.

US Patent:

20020059054, May 16, 2002

Filed:

Jun 1, 2001

Appl. No.:

09/872435

Inventors:

Stephen Bade - Lindon UT, US
Shay Ben-Chorin - Cupertino CA, US
Paul Caamano - San Mateo CA, US
Marcelo Montoreano - Santa Cruz CA, US
Ani Taggu - Campbell CA, US
Filip Thoen - San Jose CA, US
Dean Wills - Corvallis OR, US

International Classification:

G06F009/455

US Classification:

703/020000

Abstract:

An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are coupled to simulators of processor cores, preferably instruction set accurate simulators. A software debugger interface permits a software application to be loaded and executed on the virtual embedded system. A virtual test bench may be coupled to the simulation to serve as a human-machine interface. In one embodiment, the IDE is provided as a web-based service for the evaluation, development and procurement phases of an embedded system project. IP components, such as processor cores, may be evaluated using a virtual embedded system. In one embodiment, a virtual embedded system is used as an executable specification for the procurement of a good or service related to an embedded system.