Mahadev S Deshpande

US Patent:

20100250842, Sep 30, 2010

Filed:

Mar 25, 2009

Appl. No.:

12/410891

Inventors:

Mahadev S. Deshpande - Fort Collins CO, US
Ronny L. Arnold - Fort Collins CO, US
Paul L. Rogers - Fort Collins CO, US
Douglas R. Williams - Mountain View CA, US

Assignee:

ADVANCED MICRO DEVICES, INC. - Sunnyvale CA

International Classification:

G06F 12/00
G06F 12/06

US Classification:

711108, 711200, 711E12001, 711E12002

Abstract:

A first address is received and is used to determine a first address range. The first address range includes a second address range and a third address range. If the first address is in the second address range, a fourth address range is determined. The fourth address range is different from the first address range. Information is retrieved from a memory in response to determining that a second address is in the first address range or the fourth address range. If the first address is in the third address range, a fifth address range is determined. The fifth address range is different from the first address range. Other information is retrieved from the memory in response to determining the second address is in the first address range or the fifth address range.

US Patent:

20100262750, Oct 14, 2010

Filed:

Apr 13, 2009

Appl. No.:

12/422467

Inventors:

Mahadev S. Deshpande - Fort Collins CO, US
Ronny L. Arnold - Fort Collins CO, US
Josef A. Dvorak - Fort Collins CO, US
Paul L. Rogers - Fort Collins CO, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

G06F 12/08
G06F 12/00

US Classification:

711 3, 711211, 711E12001, 711E1208

Abstract:

A prefetch device and method are disclosed that determines from which addresses to speculatively fetch data based on information collected regarding previous cache-miss addresses. A historical record showing a propensity to experience cache-misses at a particular address-offset from a prior cache-miss address within a region of memory provides an indication that data needed by future instructions has an increased likelihood to be located at a similar offset from a current cache-miss address. The prefetch device disclosed herein maintains a record of the relationship between a cache-miss address and subsequent cache-miss addresses for the most recent sixty-four unique data manipulation instructions that resulted in a cache-miss. The record includes a weighted confidence value indicative of how many cache-misses previously occurred at each of a selection of offsets from a particular cache-miss address.