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Harold B Noyes

age ~67

from Herriman, UT

Also known as:
  • Harold Harb Noyes
  • Harold J Noyes
  • Herald B Noyes

Harold Noyes Phones & Addresses

  • Herriman, UT
  • 10836 Albany St, Boise, ID 83713 • 2083784901
  • Meridian, ID
  • Corvallis, OR
  • 10836 W Albany St, Boise, ID 83713

Us Patents

  • Bus Translator

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  • US Patent:
    7917684, Mar 29, 2011
  • Filed:
    Nov 5, 2008
  • Appl. No.:
    12/265436
  • Inventors:
    Harold B Noyes - Boise ID, US
    Steven P. King - Boise ID, US
  • Assignee:
    Micron Technology, Inc. - Boise ID
  • International Classification:
    G06F 13/36
    G06K 9/00
  • US Classification:
    710315, 382181
  • Abstract:
    Disclosed are methods and devices, among which is a device including a bus translator. In some embodiments, the device also includes a core module and a core bus coupled to the core module. The bus translator may be coupled to the core module via the core bus, and the bus translator may be configured to translate between signals from a selected one of a plurality of different types of buses and signals on the core bus.
  • Methods And Systems To Accomplish Variable Width Data Input

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  • US Patent:
    7970964, Jun 28, 2011
  • Filed:
    Nov 5, 2008
  • Appl. No.:
    12/265421
  • Inventors:
    Harold B Noyes - Boise ID, US
  • Assignee:
    Micron Technology, Inc. - Boise ID
  • International Classification:
    G06F 13/12
    H03M 13/00
  • US Classification:
    710 65, 710 66, 714758
  • Abstract:
    Disclosed are methods and systems for variable width data input to a pattern-recognition processor. A variable width data input method may include receiving bytes over a data bus having a first width and receiving one or more signals indicating the validity of each of the one or more bytes The valid bytes may be sequentially provided to a pattern-recognition processor in an 8-bit wide data stream. In an embodiment, a system may include one or more address lines configured to provide the one or more signals indicating the validity of the bytes transferred over the data bus. The system may include a buffer and control logic to sequentially process the valid bytes.
  • Systems, Methods, And Devices For Configuring A Device

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  • US Patent:
    8140780, Mar 20, 2012
  • Filed:
    Dec 31, 2008
  • Appl. No.:
    12/347403
  • Inventors:
    Harold B Noyes - Boise ID, US
  • Assignee:
    Micron Technology, Inc. - Boise ID
  • International Classification:
    G06F 13/28
  • US Classification:
    711156, 711100, 707601, 707687, 707736, 707758, 707790, 712 10, 712220, 714 1, 717168, 382159
  • Abstract:
    Disclosed are methods and devices, among which is a method for configuring an electronic device. In one embodiment, an electronic device may include one or more memory locations having stored values representative of the capabilities of the device. According to an example configuration method, a configuring system may access the device capabilities from the one or more memory locations and configure the device based on the accessed device capabilities.
  • Methods And Systems To Accomplish Variable Width Data Input

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  • US Patent:
    8260987, Sep 4, 2012
  • Filed:
    Jun 27, 2011
  • Appl. No.:
    13/169979
  • Inventors:
    Harold B Noyes - Boise ID, US
  • Assignee:
    Micron Technology, Inc. - Boise ID
  • International Classification:
    G06F 13/12
    H03M 13/00
  • US Classification:
    710 65, 710 66, 714758
  • Abstract:
    Disclosed are methods and systems for variable width data input to a pattern-recognition processor. A variable width data input method may include receiving bytes over a data bus having a first width and receiving one or more signals indicating the validity of each of the one or more bytes. The valid bytes may be sequentially provided to a pattern-recognition processor in an 8-bit wide data stream. In an embodiment, a system may include one or more address lines configured to provide the one or more signals indicating the validity of the bytes transferred over the data bus. The system may include a buffer and control logic to sequentially process the valid bytes.
  • Methods And Systems For Devices With A Self-Selecting Bus Decoder

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  • US Patent:
    8402188, Mar 19, 2013
  • Filed:
    Nov 10, 2008
  • Appl. No.:
    12/268270
  • Inventors:
    Harold B. Noyes - Boise ID, US
    Steven P. King - Boise ID, US
  • Assignee:
    Micron Technology, Inc. - Boise ID
  • International Classification:
    G06F 13/42
  • US Classification:
    710106, 710105, 710315
  • Abstract:
    Disclosed are methods and devices, among which is a device including a self-selecting bus decoder. In some embodiments, the device may be coupled to a microcontroller, and the self-selecting bus decoder may determine a response of the peripheral device to requests from the microcontroller. In another embodiment, the device may include a bus translator and a self-selecting bus decoder. The bus translator may be configured to translate between signals from a selected one of a plurality of different types of buses. A microcontroller may be coupled to a selected one of the plurality of different types of buses of the bus translator.
  • Adaptive Content Inspection

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  • US Patent:
    8489534, Jul 16, 2013
  • Filed:
    Dec 15, 2009
  • Appl. No.:
    12/638767
  • Inventors:
    Paul D. Dlugosch - Eagle ID, US
    Harold B Noyes - Boise ID, US
  • International Classification:
    G06F 17/18
  • US Classification:
    706 46, 715771, 709224
  • Abstract:
    Methods and apparatus are provided involving adaptive content inspection. In one embodiment, a content inspection processor may identify information with respect to input data and provide the information to a host controller. The host controller may adapt search criteria or other parameters and provide the adapted parameter to the content inspection processor. Other embodiments may include a content inspection processor having integrated feedback, such that results data is fed back to the content inspection processor. The results data may be processed before being provided to the content inspection processor.
  • Boolean Logic In A State Machine Lattice

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  • US Patent:
    8593175, Nov 26, 2013
  • Filed:
    Dec 15, 2011
  • Appl. No.:
    13/327510
  • Inventors:
    Harold B Noyes - Boise ID, US
    David R. Brown - Lucas TX, US
    Paul Glendenning - Woodside CA, US
    Irene Junjuan Xu - San Jose CA, US
  • Assignee:
    Micron Technology, Inc. - Boise ID
  • International Classification:
    G06F 7/38
    G06F 17/00
    H03K 19/173
    G06N 5/00
  • US Classification:
    326 46, 326 38, 706 45
  • Abstract:
    Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.
  • Counter Operation In A State Machine Lattice

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  • US Patent:
    8648621, Feb 11, 2014
  • Filed:
    Dec 15, 2011
  • Appl. No.:
    13/327499
  • Inventors:
    Harold B Noyes - Boise ID, US
    David R. Brown - Lucas TX, US
    Paul Glendenning - Woodside CA, US
  • Assignee:
    Micron Technology, Inc. - Boise ID
  • International Classification:
    G06F 7/38
    G06F 9/45
    G06F 7/00
  • US Classification:
    326 46, 717149, 707758
  • Abstract:
    Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may include a counter suitable for counting a number of times a programmable element in the lattice detects a condition. The counter may be configured to output in response to counting the condition was detected a certain number of times. For example, the counter may be configured to output in response to determining a condition was detected at least (or no more than) the certain number of times, determining the condition was detected exactly the certain number of times, or determining the condition was detected within a certain range of times. The counter may be coupled to other counters in the device for determining high-count operations and/or certain quantifiers.

Youtube

The Georgians: GEORGIANS BLUES (1926)

This hot goodie was recorded in Switzerland in September 1926, when Th...

  • Category:
    Music
  • Uploaded:
    28 Jul, 2008
  • Duration:
    2m 53s

Frank Guarante's World Known Georgians - Geor...

Frank Guarente, t, dir. probably: Ben Pickering, t, tb / Eddie Bave, c...

  • Category:
    Music
  • Uploaded:
    16 Apr, 2011
  • Duration:
    2m 51s

Frank Guarente's World Known Georgians - Lone...

Frank Guarente, t, dir. probably: Ben Pickering, t, tb / Eddie Bave, c...

  • Category:
    Music
  • Uploaded:
    31 Mar, 2011
  • Duration:
    2m 51s

Frank Guarente's World Known Georgians - Lone...

Frank Guarente, t, dir. probably: Ben Pickering, t, tb / Eddie Bave, c...

  • Category:
    Music
  • Uploaded:
    01 Apr, 2011
  • Duration:
    2m 50s

Frank Guarente's World Known Georgians - Hard...

Frank Guarente, t, dir. probably: Ben Pickering, t, tb / Eddie Bave, c...

  • Category:
    Music
  • Uploaded:
    30 Mar, 2011
  • Duration:
    3m 1s

Frank Guarente's World Known Georgians - Bone...

Frank Guarente, t, dir. probably: Ben Pickering, t, tb / Eddie Bave, c...

  • Category:
    Music
  • Uploaded:
    30 Mar, 2011
  • Duration:
    2m 34s

Harold Melvin & The Blue Notes - The Love I L...

Lyrics: The love I lost Was a sweet love The love I lost Was complete ...

  • Duration:
    3m 25s

Harold Budd / Brian Eno - The Pavilion Of Dre...

Recorded in London, at Basing Street Studios, November 1976. 00:00 Bis...

  • Duration:
    47m 41s

Googleplus

Harold Noyes Photo 1

Harold Noyes

Lived:
Boise, Idaho
Kaysville, Utah
Corvallis, Oregon
Work:
Micron Technology, Inc. - Electrical Engineer
Hewlett-Packard Company
Freescale Semiconductor, Inc.
Education:
Davis High School, University of Utah, Utah State University
Harold Noyes Photo 2

Harold Noyes

Myspace

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Harold Noyes

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Locality:
Spokane Valley, Washington
Birthday:
1929
Harold Noyes Photo 4

Harold Noyes

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Birthday:
1915

Facebook

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Harold Noyes

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Harold Noyes

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Classmates

Harold Noyes Photo 7

Harold Noyes

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Schools:
Pittsfield High School Pittsfield NH 1966-1970
Community:
May Locke, Marie Creed
Harold Noyes Photo 8

Pittsfield High School, P...

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Graduates:
Michael Mikula (1982-1986),
Ashley Mullen (2003-2007),
Harold Noyes (1966-1970),
Darlene Ladd (1973-1977)

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