International Business Machines Corporation - Armonk NY
International Classification:
H01L 21302
US Classification:
438745, 438 14
Abstract:
A method of determining electrical parameters of a silicon-on-insulator wafer. In this method a native oxide of a silicon layer on a silicon-on-insulator substrate is removed from a silicon mesa formed on the silicon layer. The mesa is contacted with two liquid metal electrodes. A voltage is applied to an electrode on the bottom of the silicon-on-insulator wafer. The current between the two liquid metal electrodes is measured for a combination of voltages between the liquid metal electrodes and the bottom voltage. The resulting current-voltage behavior is analyzed to obtain parameters of mobility, charge in the buried oxide of the silicon-on-insulator substrate, interface state charge, threshold voltages in the linear and saturated regions, doping density, transconductances and output conductances.
Electrical Method For Assessing Yield-Limiting Asperities In Silicon-On-Insulator Wafers
Marlene Isabel Almonte - Mohegan Lake NY Harold John Hovel - Katonah NY Richard Leo Kleinhenz - Wappingers Falls NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 2166
US Classification:
438 17, 438 18
Abstract:
An electrical method is described for determining the presence of certain defects in the buried oxide of silicon-on-insulator wafers which cause electrical breakdown at voltages low enough to cause failure during circuit processing. The method consists of carrying out current-voltage measurements on gold/silicon/buried oxide/substrate devices isolated by selective etching and analyzing the current-voltage behavior in terms of short circuit defect densities, low voltage breakdown defects, and excess current leakage defects. An additional method for detecting the low voltage breakdown defects is to monitor light flashes which accompany the breakdown.
Measurement And Analysis Of Mercury-Based Pseudo-Field Effect Transistors
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21302
US Classification:
438745, 438 14
Abstract:
Procedures, analysis techniques, and correction methods are presented for assessing the electrical properties of the Si layer of silicon-on-insulator substrates. Detailed analysis and equations are outlined in a computer algorithm written in Mathcad for both the linear and saturated regions of FET behavior.
Self-Adjusting Thickness Uniformity In Soi By High-Temperature Oxidation Of Simox And Bonded Soi
Harold J. Hovel - Katonah NY Devendra K. Sadana - Pleasantville NY
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
M01L 2176
US Classification:
438407, 438404, 438408, 438423, 438459, 438517
Abstract:
A silicon-on-insulator substrate having improved thickness uniformity as well as a method of fabricating the same is provided. Specifically, improved thickness uniformity of a SOI substrate is obtained in the present invention by subjecting a bonded or SIMOX (separation by ion implantation of oxygen) SOI substrate to a high-temperature oxidation process that is capable of improving the thickness uniformity of said SOI substrate. During this high-temperature oxidation process surface oxidation of the superficial Si-containing (i. e. , the Si-containing layer present atop the buried oxide (BOX) region) occurs; and (ii) internal thermal oxidation (ITOX), i. e. , diffusion of oxygen via the superficial Si-containing layer into the interface that exists between the BOX and the superficial Si-containing layer also occurs. Uniformity is achieved since regions of the SOI substrate which have thicker Si get less ITOX, but more surface oxidation create a thicker surface oxide (and hence thinner superficial Si-containing layer). However, regions of the SOI substrate which are thinner get more ITOX and have thinner surface oxide (and hence thicker superficial Si-containing).
Evanescent Wave Tunneling Optical Switch And Network
Daniel Guidotti - Yorktown Heights NY Harold John Hovel - Katonah NY Maurice McGlashan-Powell - Mt. Vernon NY Keith Randal Pope - Danbury CT
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G02B 626
US Classification:
385 17, 385 14, 385 30, 385 32
Abstract:
An optical switch for routing light between two waveguides is disclosed. The switch, or router, comprises a movable waveguide, the movable waveguide having two positions, wherein in a first position the movable waveguide is interposed between the two waveguides and transmits light between the two waveguides by evanescent wave coupling, and in the other position the movable waveguide is retracted from the two waveguides and is not transmitting light between the two waveguides. Means for moving the movable waveguide between the two positions is also disclosed. The optical switches are used in MÃN optical routing arrays being capable of directing light from any one of the M input ports to any one of the N output ports with additional ADD/DROP functions.
Single And Double-Gate Pseudo-Fet Devices For Semiconductor Materials Evaluation
Harold J. Hovel - Katonah NY, US Thermon E. McKoy - New Windsor NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L021/66
US Classification:
438 17, 438149, 438157, 438479, 438652
Abstract:
Several methods and structures are disclosed for determining electrical properties of silicon-on-insulator (SOI) wafers and alternate versions of such wafers such as strained silicon:silicon/germanium:-on-insulator (SSGOI) wafers. The analyzed electrical properties include mobilities, interface state densities, and oxide charge by depositing electrodes on the wafer surface and measuring the current-voltage behavior using these electrodes. In a single gate structure, the source and drain electrodes reside on the wafer surface and the buried insulator acts as the gate oxide, with the substrate acting as the gate electrode. In a double gate structure, an oxide is used on the upper surface between the source and drain electrodes and an additional metal layer is used on top of this oxide to act as a second gate electrode. Light of broad spectrum or specific wavelength may be used to alter electrical carrier densities in the region between the electrodes to further analyze the electrical properties of the material, or alternatively, the device can be used as a detector of light having a wavelength shorter than the bandgap wavelength of the Si surface.
Single And Double-Gate Pseudo-Fet Devices For Semiconductor Materials Evaluation
Harold J. Hovel - Katonah NY, US Thermon E. McKoy - New Windsor NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/00 H01L 21/84
US Classification:
438164, 438 39, 438153, 257E21377
Abstract:
Several methods and structures are disclosed for determining electrical properties of silicon-on-insulator (SOI) wafers and alternate versions of such wafers such as strained silicon:silicon/germanium:-on-insulator (SSGOI) wafers. The analyzed electrical properties include mobilities, interface state densities, and oxide charge by depositing electrodes on the wafer surface and measuring the current-voltage behavior using these electrodes, In a single gate structure, the source and drain electrodes reside on the wafer surface and the buried insulator acts as the gate oxide, with the substrate acting as the gate electrode. In a double gate structure, an oxide is used on the upper surface between the source and drain electrodes and an additional metal layer is used on top of this oxide to act as a second gate electrode. Light of broad spectrum or specific wavelength may be used to alter electrical carrier densities in the region between the electrodes to further analyze the electrical properties of the material, or alternatively, the device can be used as a detector of light having a wavelength shorter than the bandgap wavelength of the Si surface.
Single And Double-Gate Pseudo-Fet Devices For Semiconductor Materials Evaluation
Harold J. Hovel - Katonah NY, US Thermon E. McKoy - New Windsor NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L 21/36
US Classification:
438 17, 438571, 438586, 257E21587
Abstract:
Several methods and structures are disclosed for determining electrical properties of silicon-on-insulator (SOI) wafers and alternate versions of such wafers such as strained silicon:silicon/germanium:-on-insulator (SSGOI) wafers. The analyzed electrical properties include mobilities, interface state densities, and oxide charge by depositing electrodes on the wafer surface and measuring the current-voltage behavior using these electrodes. In a single gate structure, the source and drain electrodes reside on the wafer surface and the buried insulator acts as the gate oxide, with the substrate acting as the gate electrode. In a double gate structure, an oxide is used on the upper surface between the source and drain electrodes and an additional metal layer is used on top of this oxide to act as a second gate electrode. Light of broad spectrum or specific wavelength may be used to alter electrical carrier densities in the region between the electrodes to further analyze the electrical properties of the material, or alternatively, the device can be used as a detector of light having a wavelength shorter than the bandgap wavelength of the Si surface.
Carnegie Mellon University's College of Engineering 1960 - 1968
Doctorates, Bachelors, Doctor of Philosophy, Bachelor of Science, Electrical Engineering
Carnegie Mellon University 1957 - 1960
Master of Science, Doctorates, Bachelors, Masters, Doctor of Philosophy, Electronics Engineering
Skills:
Physics Microsoft Office Project Management Microsoft Excel R&D Data Analysis Product Development Photovoltaics Light Emitting Diodes Electrical Testing Semiconductor Physics Field Effect Transistors Heterojunctions Materials Science Semiconductor Material and Device Characterization C++