Gregory S Winn

US Patent:

6891361, May 10, 2005

Filed:

Dec 31, 2002

Appl. No.:

10/335555

Inventors:

Gregory Scott Winn - Fort Collins CO, US

Assignee:

LSI Logic Corporation - Milpitas CA

International Classification:

G01R023/02

US Classification:

324 7639, 360 65

Abstract:

The present invention is a method, system, and product for testing operating characteristics of a continuous-time or discrete-time device under test, which is included within a circuit. The operating characteristics of the continuous-time or discrete-time device are tested utilizing electronic components that already exist within the circuit such that a test circuit is not utilized to test the device. The circuit includes a variable gain amplifier and an automatic gain correction (AGC) circuit. The operating characteristics of the device are tested utilizing the variable gain amplifier and said AGC circuit.

US Patent:

7414322, Aug 19, 2008

Filed:

Jul 29, 2005

Appl. No.:

11/193808

Inventors:

Leah M. Miller - Fremont CA, US
Gregory S. Winn - Fort Collins CO, US

Assignee:

LSI Corporation - Milpitas CA

International Classification:

H01L 23/48

US Classification:

257786

Abstract:

The embodiments of the present invention are directed toward the design of routing patterns, including elements such as contacts, traces, and vias, for high speed differential signal pairs in integrated circuit package substrates.

US Patent:

7566923, Jul 28, 2009

Filed:

Dec 23, 2005

Appl. No.:

11/318332

Inventors:

Donald T. McGrath - Fort Collins CO, US
Gregory Winn - Fort Collins CO, US
Scott C. Savage - Fort Collins CO, US

Assignee:

LSI Corporation - Milpitas CA

International Classification:

H01L 27/118

US Classification:

257204, 257E2711, 438128

Abstract:

A platform application specific integrated circuit (ASIC) including a base layer. The base layer generally comprises a predefined input/output (I/O) region and a predefined core region. The predefined input/output (I/O) region may comprise a plurality of pre-diffused regions disposed in the platform ASIC. The predefined core region may comprise one or more metal layers defining a plurality of power regions formed according to a custom design created after the base layer is fabricated. The base layer can be customized by depositing one or more metal layers.

US Patent:

8458546, Jun 4, 2013

Filed:

May 12, 2011

Appl. No.:

13/106040

Inventors:

Mohammad Mobin - Orefield PA, US
Matthew Tota - Clinton NJ, US
Gregory Winn - Fort Collins CO, US

Assignee:

LSI Corporation - Milpitas CA

International Classification:

G06F 11/00

US Classification:

714744, 714814, 375355

Abstract:

In described embodiments, a transceiver supports two or more rates using an oversampling clock and data recovery (CDR) circuit sampling high rate data with a predetermined CDR sampling clock. A timing recovery circuit detects and accounts for extra or missing samples when oversampling lower rate data. An edge detector detects each actual data symbol edge and provides for an edge decision offset in a current instant's block of samples. An edge error is generated from the previous instant's actual and calculated edges; and an edge distance between actual edges of the current and previous instants is generated. Filtered edge distance and error are combined to generate a calculated edge position for the data symbol edge for the current instant. The edge decision offset is applied to the current calculated edge position to identify a sample value to generate a decision for the data symbol to detect the current data value.

US Patent:

20110296215, Dec 1, 2011

Filed:

May 28, 2010

Appl. No.:

12/790283

Inventors:

Mohammad S. Mobin - Orefield PA, US
Mehran Aliahmad - Manotick, CA
Matthew Tota - Clinton NJ, US
Gregory Scott Winn - Fort Collins CO, US

International Classification:

G06F 1/32
H04L 27/00

US Classification:

713323, 375259

Abstract:

A signal generator circuit for reducing power consumption of message communications between a first device including the signal generator circuit and a second device coupled to the first device comprises a switching circuit and a controller coupled to the switching circuit. The controller is operative to receive a reference clock signal, to receive at least a first control signal indicative of a request for the first device to send a message to the second device when the first device is in a first mode of operation, and to generate an output control signal and an output data signal. The output control signal is operative as a function of the first control signal to selectively power up the switching circuit and a transmitter driver during the first mode. The output data signal includes the message supplied to the transmitter driver, via the switching circuit, for transmission to the second device during the first mode.

US Patent:

59107510, Jun 8, 1999

Filed:

Feb 14, 1997

Appl. No.:

8/800608

Inventors:

Gregory Scott Winn - Rochester MN
Raymond Alan Richetta - Rochester MN

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03G 522
H03F 130

US Classification:

327560

Abstract:

A circuit arrangement and method vary in response to temperature changes the signal swing of an input signal to an analog circuit which has a temperature-dependent effective linear signal range. A variable gain circuit varies the signal swing of the input signal in response to a control signal supplied thereto by a temperature control circuit so that the signal swing tracks changes in the effective linear signal range of the analog circuit. In this manner, signal to noise ratio may be optimized and distortion may be minimized over a range of operating temperatures for the analog circuit.

US Patent:

6268972, Jul 31, 2001

Filed:

Sep 18, 1998

Appl. No.:

9/157226

Inventors:

Rick Allen Philpott - Rochester MN
Gregory Scott Winn - Fort Collins CO

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G11B 509

US Classification:

360 46

Abstract:

A method for measuring an amplitude of a readback signal obtained from a data storage medium involves transmitting the readback signal to a gain modifying amplifier, such as a variable gain amplifier (VGA), preferably provided in the read channel. A voltage signal associated with a loop gain of the amplification circuitry is sensed and compared with a number of control voltage signals, each of the control voltage signals being associated with a corresponding digital word value. The digital word value associated with a control voltage signal that is equal to the sensed voltage signal represents the relative amplitude of the readback signal. Gain characterization circuitry may further be combined with readback signal amplitude measuring circuitry, preferably in-situ a read channel, to obtain the absolute amplitude of a readback signal. Gain characteristics of the amplification circuitry are determined by applying reference voltage signals associated with corresponding pre-established gain values to the signal input of the gain modifying amplifier. A control voltage signal is selectively applied to the amplifier for each of the reference voltage signals until the amplifier output voltage signal is substantially equal to a pre-established reference voltage signal.

US Patent:

62820389, Aug 28, 2001

Filed:

Feb 19, 1999

Appl. No.:

9/253122

Inventors:

Anthony Richard Bonaccio - Shelburne VT
Rick Allen Philpott - Rochester MN
Peter John Windler - Rochester MN
Gregory Scott Winn - Fort Collins CO

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G11B 509

US Classification:

360 46

Abstract:

An apparatus and method for estimating an amplitude of a readback signal obtained from a data storage medium and input to a gain modifying amplifier involves sensing an amplifier output signal in response to a readback signal applied to the amplifier. An amplifier control signal is produced which is representative of a difference between the amplifier output signal and a reference signal. A compensation signal associated with a temperature coefficient of amplifier gain is generated, and an estimate signal indicative of the amplitude of the readback signal is produced using the compensation signal. The estimate signal is representative of readback signal amplitude when the estimate signal has a magnitude equivalent to that of the difference signal and a polarity opposite that of the difference signal. Generating the compensation signal may further involve generating a first compensation signal having a magnitude proportional to absolute temperature and generating a second compensation signal having a magnitude independent of temperature. The first and second compensation signals may be selectively used to cancel temperature related gain and polarity variations in the amplifier control signal.