Emre Armagan

US Patent:

20160233175, Aug 11, 2016

Filed:

Feb 10, 2015

Appl. No.:

14/618647

Inventors:

- Santa Clara CA, US
Emre Armagan - Chandler AZ, US
Rajendra C. Dias - Phoenix AZ, US
Lars D. Skoglund - Chandler AZ, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 23/00
H01L 21/56
H01L 23/12
H01L 21/304
H01L 29/06
H01L 23/31

Abstract:

A microelectronic die may be formed with chamfer corners for reducing stresses which can lead to delamination and/or cracking failures when such a microelectronic die is incorporated into a microelectronic package. In one embodiment, a microelectronic die may include at least one substantially planar chamfering side extending between at least two adjacent sides of a microelectronic die. In another embodiment, a microelectronic die may include at least one substantially curved or arcuate chamfering side extending between at least two adjacent sides of a microelectronic die.