VINAY SARIPALLI - UNIVERSITY PARK PA, US DHEERAJ MOHATA - UNIVERSITY PARK PA, US SAURABH MOOKHERJEA - HILLSBORO OR, US SUMAN DATTA - PORT MATILDA PA, US VIJAYKRISHNAN NARAYANAN - STATE COLLEGE PA, US
Assignee:
THE PENN STATE RESEARCH FOUNDATION - UNIVERSITY PARK PA
International Classification:
G11C 11/34
US Classification:
365156, 365154
Abstract:
A four transistor (4T) memory device is provided. The device includes a first cell transistor and a second cell transistor, the first and second cell transistors coupled to each other and defining latch circuitry having at least one multi-stable node. The device further includes a first access transistor and a second access transistor, the first and second access transistors coupling the at least one multi-stable node to at least one bit-line. In the device, each of the first and second cell transistors and each of the first and second access transistors is a unidirectional field effect transistor configured for conducting current in a first direction and to be insubstantially incapable of conducting current in a second direction.
Heterojunction Bipolar Transistors For Improved Radio Frequency (Rf) Performance
- Greensboro NC, US Brian G. Moser - Jamestown NC, US Jing Zhang - Greensboro NC, US Thomas James Rogers - Greensboro NC, US Dheeraj Mohata - Jamestown NC, US
The present disclosure relates to heterojunction bipolar transistors for improved radio frequency (RF) performance. In this regard, a heterojunction bipolar transistor includes a base, an emitter, and a collector. The base is formed over the collector such that a base-collector junction is formed between the base and the collector. The base-collector junction is configured to become forward-biased at a first turn-on voltage. The emitter is formed over the base such that a base-emitter junction is formed between the base and the emitter. The base-emitter junction is configured to become forward-biased at a second turn-on voltage, as opposed to the first turn-on voltage. Notably, the second turn-on voltage is lower than the first turn-on voltage.
Global Communication Semiconductors,Inc.
Senior Integration Engineer
Qorvo, Inc. Feb 2013 - Sep 2016
Senior Device Engineer
Penn State University Jun 2009 - Jan 2013
Phd Candidate, Graduate Research Assistant
Indian Institute of Technology, Kanpur Jul 2008 - Jun 2009
Senior Project Associate
Education:
Penn State University 2009 - 2012
Doctorates, Doctor of Philosophy
Indian Institute of Technology, Kanpur 2006 - 2008
Masters, Master of Technology, Electrical Engineering
Skills:
Characterization Scanning Electron Microscopy Matlab Photolithography Thin Films Semiconductor Device 2D Tcad Simulations Ebeam Lithography Ellipsometry Icp Rie Semiconductors Physics Jmp Sas K Layout Edx
Interests:
Simulation
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tribute to seniors.wmv
this a tribute to the seniors of 2009-10 batch of sesomu school