Chris Haywood

US Patent:

6987775, Jan 17, 2006

Filed:

Aug 15, 2001

Appl. No.:

09/930804

Inventors:

Chris Haywood - Thousand Oaks CA, US

Assignee:

Internet Machines Corp. - Agoura Hills CA

International Classification:

H04L 12/54

US Classification:

370429, 710 29

Abstract:

A variable size first in first out (FIFO) memory is provided. The variable size FIFO memory may include head and tail FIFO memories operating at a very high data rate and an off chip buffer memory. The off chip buffer memory may be, for example, of a dynamic RAM type. The off chip buffer memory may temporarily store data packets when both head and tail FIFO memories are full. Data blocks of each of the memories may be the same size for efficient transfer of data. After a sudden data burst which causes memory overflow ceases, the head and tail FIFO memories return to their initial functions with the head FIFO memory directly receiving high speed data and transmitting it to various switching element and the tail FIFO memory storing temporary overflows of data from the head FIFO memory.

US Patent:

7421532, Sep 2, 2008

Filed:

Jan 6, 2005

Appl. No.:

11/031853

Inventors:

Heath Stewart - Santa Barbara CA, US
Michael de la Garrigue - Agoura Hills CA, US
Chris Haywood - Thousand Oaks CA, US

Assignee:

Topside Research, LLC - Williamsburg VA

International Classification:

G06F 13/00

US Classification:

710315, 710306, 710313, 710316

Abstract:

There are disclosed apparatus and methods for switching. Transparent and non-transparent ports are provided. Data units are transferred between the transparent ports, between the transparent and non-transparent ports, and between the non-transparent ports.

US Patent:

7426602, Sep 16, 2008

Filed:

Jan 7, 2005

Appl. No.:

11/031420

Inventors:

Heath Stewart - Santa Barbara CA, US
Chris Haywood - Thousand Oaks CA, US
Mike de la Garrigue - Agoura Hills CA, US
Nadim Shaikli - San Diego CA, US
Ken Wong - San Diego CA, US
Bao Vuong - San Diego CA, US
Thomas Reiner - Carlsbad CA, US
Adam Rappoport - Agoura Hills CA, US

Assignee:

Topside Research, LLC - Williamsburg VA

International Classification:

G06F 13/14
G06F 3/00

US Classification:

710317, 710 29

Abstract:

There is disclosed a bus optimization technique. Pursuant to the bus optimization technique, the output buffer and output logic are removed from port units of a switch and are included with a control matrix in the switch. Data units received in a first port unit of a plurality of port units are provided to a control matrix. The control matrix evaluates when to send the data unit to a second port unit. No output decisions are made in the second port unit.

US Patent:

7454552, Nov 18, 2008

Filed:

Nov 18, 2004

Appl. No.:

10/993277

Inventors:

Heath Stewart - Santa Barbara CA, US
Michael de la Garrigue - Agoura Hills CA, US
Chris Haywood - Thousand Oaks CA, US

Assignee:

Topside Research, LLC - Williamsburg VA

International Classification:

G06F 13/00

US Classification:

710315, 710306, 710313

Abstract:

There are disclosed apparatus and methods for switching. Transparent and non-transparent ports are provided. Data units are transferred between the transparent ports, between the transparent and non-transparent ports, and between the non-transparent ports.

US Patent:

7539190, May 26, 2009

Filed:

Feb 13, 2004

Appl. No.:

10/778857

Inventors:

Heath Stewart - Santa Barbara CA, US
Michael de la Garrigue - Agoura Hills CA, US
Chris Haywood - Thousand Oaks CA, US
Thomas Reiner - Carlsbad CA, US
Ken Wong - San Diego CA, US

Assignee:

Topside Research, LLC - Williamsburg VA

International Classification:

H04L 12/56

US Classification:

370390, 370428, 370432

Abstract:

There is disclosed apparatus and methods of multicasting in a shared address space. There may be defined a number of portions of the address space. There may be groups of the portions, and data units addressed to one portion within the group may be re-addressed to the other portions.

US Patent:

7590791, Sep 15, 2009

Filed:

Aug 21, 2008

Appl. No.:

12/196025

Inventors:

Heath Stewart - Santa Barbara CA, US
Chris Haywood - Thousand Oaks CA, US
Michael De La Garrigue - Agoura Hills CA, US
Nadim Shaikli - San Diego CA, US
Ken Wong - San Diego CA, US
Bao Vuong - San Diego CA, US
Thomas Reiner - Carlsbad CA, US
Adam Rappoport - Agoura Hills CA, US

Assignee:

Topside Research, LLC - Williamsburg VA

International Classification:

G06F 13/14
G06F 3/00

US Classification:

710317, 710 29

Abstract:

There is disclosed a bus optimization technique. Pursuant to the bus optimization technique, the output buffer and output logic are removed from port units of a switch and are included with a control matrix in the switch. Data units received in a first port unit of a plurality of port units are provided to a control matrix. The control matrix evaluates when to send the data unit to a second port unit. No output decisions are made in the second port unit.

US Patent:

7639707, Dec 29, 2009

Filed:

Sep 27, 2005

Appl. No.:

11/237481

Inventors:

Chris Haywood - Agoura Hills CA, US

International Classification:

H04L 12/54

US Classification:

370429, 370391, 370394, 37039521, 370412, 370413, 370428, 375316, 710 29, 710 52

Abstract:

A variable size first in first out (FIFO) memory is disclosed. The variable size FIFO memory may include head and tail FIFO memories operating at a very high data rate and an off chip buffer memory. The off chip buffer memory may be, for example, of a dynamic RAM type. The off chip buffer memory may temporarily store data packets when both head and tail FIFO memories are full. Data blocks of each of the memories may be the same size for efficient transfer of data. After a sudden data burst which causes memory overflow ceases, the head and tail FIFO memories return to their initial functions with the head FIFO memory directly receiving high speed data and transmitting it to various switching element and the tail FIFO memory storing temporary overflows of data from the head FIFO memory.

US Patent:

7814259, Oct 12, 2010

Filed:

Aug 20, 2008

Appl. No.:

12/195122

Inventors:

Heath Stewart - Santa Barbara CA, US
Michael de la Garrigue - Agoura Hills CA, US
Chris Haywood - Thousand Oaks CA, US

Assignee:

Internet Machines, LLC - Longview TX

International Classification:

G06F 13/00

US Classification:

710315, 710306, 710313

Abstract:

There are disclosed apparatus and methods for switching. Transparent and non-transparent ports are provided. Data units are transferred between the transparent ports, between the transparent and non-transparent ports, and between the non-transparent ports.

Author:

Chris Haywood

ISBN #:

0333987837

Author:

Chris Haywood

ISBN #:

0333987845

Author:

Chris Haywood

ISBN #:

0335208916

Author:

Chris Haywood

ISBN #:

0335208924