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Benjamin W Mashak

age ~50

from Round Rock, TX

Also known as:
  • Benjamin T Mashak
  • Ben W Mashak

Benjamin Mashak Phones & Addresses

  • Round Rock, TX
  • Austin, TX
  • Rochester, MN
  • Pine Island, MN
  • Madison, WI

Us Patents

  • Flex Strips For High Frequency Connectors

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  • US Patent:
    6971896, Dec 6, 2005
  • Filed:
    Jan 8, 2004
  • Appl. No.:
    10/753521
  • Inventors:
    Gerald Keith Bartley - Rochester MN, US
    Richard Boyd Ericson - Rochester MN, US
    Wesley David Martin - Elgin MN, US
    Benjamin William Mashak - Rochester MN, US
    Trevor Joseph Timpane - Rochester MN, US
    Ay Vang - Vadnais Heights MN, US
  • Assignee:
    International Business Machines Corporaion - Armonk NY
  • International Classification:
    H01R004/60
  • US Classification:
    439215
  • Abstract:
    A high frequency connector utilizes flex strip signal/reference conductor pairs extending in channels formed in a dielectric connector body between terminations at connector ends. The flex strips are formed as signal and reference conductor traces separated by a flexible dielectric wherein the impedance can be influenced by the width of the signal and reference traces and the thickness and selected material of the dielectric separating the adjoining conductor traces. Design of the flex strip assemblies is used to vary the capacitance which enables the connector impedance to match the impedance of the circuits and/or cables connected to the connector and mitigate any discontinuities among the sequence of circuit paths. The close proximity of signal and reference traces within the pair and the separation of signal lines in the connector body reduces cross talk by minimizing mutual inductance between signal lines.
  • Apparatus And Method For Composite Behavioral Modeling For Multiple-Sourced Integrated Circuits

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  • US Patent:
    7447619, Nov 4, 2008
  • Filed:
    Sep 29, 2005
  • Appl. No.:
    11/239600
  • Inventors:
    Gerald Keith Bartley - Rochester MN, US
    Richard Boyd Ericson - Rochester MN, US
    Wesley David Martin - Elgin MN, US
    Benjamin William Mashak - Rochester MN, US
    Trevor Joseph Timpane - Rochester MN, US
    Ay Vang - Vadnais Heights MN, US
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    G06F 17/50
    G06F 17/10
  • US Classification:
    703 14, 703 2, 703 6, 703 17, 716 5, 716 17
  • Abstract:
    An apparatus and method for simulation and testing of electronic systems using a single model that has the composite behavioral information of multiple parts. The single model allows the designer to simulate using one model that captures the anticipated extremes (best case behavior to worst case behavior) across a collection of devices from different vendors.
  • Stepped Integrated Circuit Packaging And Mounting

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  • US Patent:
    20060097370, May 11, 2006
  • Filed:
    Oct 21, 2004
  • Appl. No.:
    10/970410
  • Inventors:
    Gerald Bartley - Rochester MN, US
    Richard Ericson - Rochester MN, US
    Wesley Martin - Elgin MN, US
    Benjamin Mashak - Rochester MN, US
    Trevor Timpane - Rochester MN, US
    Ay Vang - Vadnais Heights MN, US
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    H01L 23/02
  • US Classification:
    257678000
  • Abstract:
    An electronic assembly and system and method implementing the same are disclosed herein. The electronic assembly includes an IC carrier package having circuitry contained within a housing unit. The IC carrier package includes a connector interface for electrically coupling the IC carrier package circuitry to a printed circuit board. The connector interface is further characterized as having a graduated step surface contour with one or more electrical contacts disposed on at least two graduated step connector surfaces of the connector interface. The electronic assembly further includes a multilayer printed circuit board having a mounting site cavity for mounting the IC carrier package. The mounting site cavity includes having at least two seating surfaces offset in a graduated step manner for receivably seating the at least two graduated step connector surfaces of the IC carrier package connector interface.
  • Via Resistor Structure And Method For Trimming Resistance Value

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  • US Patent:
    20070236895, Oct 11, 2007
  • Filed:
    Mar 30, 2006
  • Appl. No.:
    11/393140
  • Inventors:
    Gerald Bartley - Rochester MN, US
    Richard Ericson - Rochester MN, US
    Mark Hoffmeyer - Rochester MN, US
    Wesley Martin - Elgin MN, US
    Benjamin Mashak - Rochester MN, US
    Trevor Timpane - Rochester MN, US
    Ay Vang - Vadnais Heights MN, US
  • International Classification:
    H05K 1/14
  • US Classification:
    361737000
  • Abstract:
    A via resistor structure and method are provided for implementing a resistor and for trimming a resistance value of the resistor. A resistive material selectively is deposited adjacent to a pad connecting to a via where a resistor is to be defined. A trimmed path is formed in the resistive material for selectively changing the resistance value of the resistor.
  • Scalable Electronic Package Assembly For Memory Devices And Other Terminated Bus Structures

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  • US Patent:
    20090268422, Oct 29, 2009
  • Filed:
    Apr 29, 2008
  • Appl. No.:
    12/111791
  • Inventors:
    Mark J. Bailey - Lake City MN, US
    Gerald K. Bartley - Rochester MN, US
    Richard B. Ericson - Rochester MN, US
    Wesley D. Martin - Elgin MN, US
    Benjamin W. Mashak - Rochester MN, US
    Trevor J. Timpane - Rochester MN, US
  • International Classification:
    H05K 1/11
  • US Classification:
    361803
  • Abstract:
    A scalable electronic package assembly for memory devices and other terminated bus structures is disclosed. The scalable electronic package assembly includes a first electronic carrier and a second electronic carrier. The first electronic carrier includes a first set of electronic devices controlled by a controller. The second electronic carrier includes a second set of electronic devices that are also controlled by the controller on the first electronic carrier. The second electronic carrier is electrically connected to the first electronic carrier via multiple solder columns. The second electronic carrier is physically stacked on top of the first electronic carrier via an insulator.
  • Dynamic Compensation Of Airflow In Electronics Enclosures With Failed Fans

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  • US Patent:
    20140036441, Feb 6, 2014
  • Filed:
    Jul 31, 2012
  • Appl. No.:
    13/562597
  • Inventors:
    Benjamin William Mashak - Rochester MN, US
    Arden Lot Moore - Cedar Park TX, US
    Katie L. Pizzolato - Austin TX, US
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    F24F 7/007
    G06F 1/20
    H05K 7/20
  • US Classification:
    361695, 236 493
  • Abstract:
    An approach is provided in which a cooling manager detects a failed fan included in an electronic enclosure. The electronic enclosure includes multiple fans that each cool different component areas in the electronic enclosure. The cooling manager selects an airflow compensator that corresponds to a functioning fan included in the electronic enclosure, which includes a fixed perforated member and a movable perforated member. In turn, the cooling manager adjusts the selected airflow compensator to redirect a portion of airflow generated by the functioning fan to the component area corresponding to the failed fan.
  • Active Clamp Network For Multiple Voltages

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  • US Patent:
    62293729, May 8, 2001
  • Filed:
    Nov 19, 1999
  • Appl. No.:
    9/443609
  • Inventors:
    Benjamin William Mashak - Rochester MN
    Robert Russell Williams - Rochester MN
    Steven Howard Voldman - South Burlington VT
    David TinSun Hui - Poughkeepsie NY
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    H03K 508
  • US Classification:
    327318
  • Abstract:
    An active clamp circuit for digital circuits includes a first MOSFET serially connected between an upper power supply voltage and an input terminal to be clamped, and a second MOSFET serially connected between a lower voltage power supply and the input terminal. The voltages at the gates of the first and second MOSFETs are held at constant first and second reference voltages by a reference circuit and the first reference voltage at the gate of the first MOSFET is less than the second reference voltage at the gate of the second MOSFET. The first and second reference voltages can be changed by connecting the reference circuit to power supply voltages other than the power supply voltages to which the first and second MOSFETs are connected. The reference voltages can also be varied by adding stages of transistors which act as resistors in parallel to the reference circuit. When the first reference voltage is to be varied, it is recommended that the transistors of opposite type be biased independently.
  • Concentrically Symmetric Connector In Blind Mate Round Fan Assembly

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  • US Patent:
    20170241440, Aug 24, 2017
  • Filed:
    Feb 24, 2016
  • Appl. No.:
    15/052200
  • Inventors:
    - Armonk NY, US
    Rachael C. FREITAS - Austin TX, US
    Benjamin W. MASHAK - Rochester MN, US
    George ZACHARAKIS-JUTZ - Austin TX, US
  • International Classification:
    F04D 29/64
    F04D 25/16
    H05K 9/00
    F04D 29/52
    F04D 29/32
    F04D 19/00
    F04D 29/70
  • Abstract:
    A fan assembly system includes two or more circular fans, each fan situated in a round fan assembly, where each fan can be situated in the round fan assembly in any orientation. The system also includes a concentrically symmetric connector for each circular fan, located in a center of each circular fan. The system also includes a latching mechanism for each circular fan, where the latching mechanism is wholly contained within a swept area of a fan blade of the circular fan. The circular fans are arranged in a staggered arrangement, and the staggered arrangement of circular fans increases a number of circular fans that can be placed in the fan assembly system compared to a non-staggered arrangement.

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