Bazhong Shen

US Patent:

20090161613, Jun 25, 2009

Filed:

Oct 22, 2008

Appl. No.:

12/256080

Inventors:

Mark Kent - Vista CA, US
Bazhong Shen - Irvine CA, US

International Classification:

H04W 72/04

US Classification:

370329

Abstract:

Aspects of a method and system for constructing channel quality indicator tables for feedback in a communication system are provided. A user terminal may receive a signal transmitted by using a modulation and coding scheme (MCS) from a base station. The user terminal may assess channel quality information by accessing a CQI table to identify a CQI value based on the received radio signal. The CQI table may comprise various modulation regions in terms of spectral efficiency. The identified CQI value may be transmitted to the base station. Various standard system protocols such 3GPP, 3GPP LTE, or WiMAX, may be used for transmissions. The CQI table may be generated via PER versus spectral efficiency and/or SNR, respectively. The base station may select a MCS based on the CQI feedback from the user terminal for transmitting a subsequent radio signal to the user terminal.

US Patent:

20090232050, Sep 17, 2009

Filed:

Oct 1, 2008

Appl. No.:

12/243398

Inventors:

Bazhong Shen - Irvine CA, US
Mark Kent - Vista CA, US

International Classification:

H04W 8/00

US Classification:

370328

Abstract:

Aspects of a method and system for determining a limited soft buffer size on transport blocks for rate matching are provided. A data stream may be processed for transmission between a base station (eNodeB) and a UE via HARQ procedures. A two-stage rate-matching algorithm may be used in the HARQ procedures. A limited virtual soft buffer size at the UE in the two-stage rate-matching algorithm may be calculated on site based on channel condition information, available channel bandwidth, number of layers in spatial multiplexing, and the capacity of the UE, respectively. The data stream may be first rate-matched to the calculated limited soft buffer size available at the UE, and forwarded for second stage rate-matching to an actual physical channel size determined by the base station. The amount of bits forwarded for second stage rate-matching may equal to the calculated limited virtual soft buffer size of the virtual soft buffer.

US Patent:

20100023670, Jan 28, 2010

Filed:

Jul 25, 2008

Appl. No.:

12/180205

Inventors:

Tak Lee - Irvine CA, US
Bazhong Shen - Irvine CA, US

International Classification:

G06F 13/38

US Classification:

710316

Abstract:

Described herein are system(s) and method(s) for routing data in a parallel Turbo decoder. Aspects of the present invention address the need for reducing the physical circuit area, power consumption, and/or latency of parallel Turbo decoders. According to certain aspects of the present invention, address routing-networks may be eliminated, thereby reducing circuit area and power consumption. According to other aspects of the present invention, address generation may be moved from the processors to dedicated address generation modules, thereby decreasing connectivity overhead and latency.

US Patent:

20130198582, Aug 1, 2013

Filed:

Jan 25, 2013

Appl. No.:

13/750280

Inventors:

Bazhong SHEN - Irvine CA, US
Djordje TUJKOVIC - Mountain View CA, US
Soumen CHAKRABORTY - Bangalore, IN
Jing HUANG - Irvine CA, US
Shiv Prakash SHET - Chennai, IN
Kamlesh RATH - San Ramon CA, US
David GARRETT - Tustin CA, US
Andrew BLANKSBY - Lake Oswego OR, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03M 13/29

US Classification:

714755

Abstract:

A system and method is provided for encoding k input symbols into a longer stream of n output symbols for transmission over an erasure channel such that the original k input symbols can be recovered from a subset of the n output symbols without the need for any retransmission. A symbol is a generic data unit, consisting of one or more bits, that can be, for example, a packet. The system and method utilize a network of erasure codes, including block codes and parallel filter codes to achieve performance very close to the ideal MDS code with low encoding and decoding computational complexity for both small and large encoding block sizes. This network of erasure codes is referred to as a supercharged code. The supercharged code can be used to provide packet-level protection at, for example, the network, application, or transport layers of the Internet protocol suite.

US Patent:

20200052877, Feb 13, 2020

Filed:

Aug 19, 2019

Appl. No.:

16/544776

Inventors:

- Singapore, SG
Peiqing WANG - Laguna Beach CA, US
Ahmad CHINI - Mission Viejo CA, US
Yencheng CHEN - Fremont CA, US
Mehmet Vakif TAZEBAY - Irvine CA, US
Bazhong SHEN - Irvine CA, US

International Classification:

H04L 7/10
H04L 12/413

Abstract:

A primary device implementing the subject system of link establishment for single pair Ethernet may include at least one processor. The at least one processor may be configured to transmit a first synchronization sequence to a secondary device, detect a second synchronization sequence transmitted by the secondary device, the second synchronization sequence differing from the first synchronization sequence, and after detection of the second synchronization sequence, initiate a training stage, the train stage comprising exchanging training frames with the secondary device. The at least one processor may be further configured to enter a data mode for data transmissions after completion of the training stage, the data transmissions being distinct from the training frames. In the data mode, data may be forward error correction encoded and then scrambled.

US Patent:

20180331819, Nov 15, 2018

Filed:

Jul 3, 2018

Appl. No.:

16/027131

Inventors:

- Singapore, SG
Peiqing WANG - Laguna Beach CA, US
Ahmad CHINI - Mission Viejo CA, US
Yencheng CHEN - Fremont CA, US
Mehmet Vakif TAZEBAY - Irvine CA, US
Bazhong SHEN - Irvine CA, US

International Classification:

H04L 7/10
H04L 12/413

Abstract:

A primary device implementing the subject system of link establishment for single pair Ethernet may include at least one processor. The at least one processor may be configured to transmit a first synchronization sequence to a secondary device, detect a second synchronization sequence transmitted by the secondary device, the second synchronization sequence differing from the first synchronization sequence, and after detection of the second synchronization sequence, initiate a training stage, the train stage comprising exchanging training frames with the secondary device. The at least one processor may be further configured to enter a data mode for data transmissions after completion of the training stage, the data transmissions being distinct from the training frames. In the data mode, data may be forward error correction encoded and then scrambled.

US Patent:

20160365967, Dec 15, 2016

Filed:

Jul 9, 2015

Appl. No.:

14/795840

Inventors:

- Irvine CA, US
Peiqing WANG - Laguna Beach CA, US
Ahmad CHINI - Mission Viejo CA, US
Yencheng CHEN - Fremont CA, US
Mehmet Vakif TAZEBAY - Irvine CA, US
Bazhong SHEN - Irvine CA, US

International Classification:

H04L 7/00

Abstract:

A primary device implementing the subject system of link establishment for single pair Ethernet may include at least one processor circuit. The at least one processor circuit may be configured to transmit a first synchronization sequence to a secondary device and to subsequently detect a second synchronization sequence, different than the first, transmitted by the secondary device. The synchronization sequences may be pseudo-noise sequences that have strong autocorrelation characteristics. The at least one processor circuit may be configured to wait a predetermined amount of time after completing the detection of the second synchronization sequence, and then may initiate a training stage. The training stage may include exchanging scrambler states of additive scramblers used by the primary and secondary devices. The at least one processor circuit may be configured to enter a data mode upon completion of training. In the data mode, data is forward error correction encoded and then scrambled.

US Patent:

20150146827, May 28, 2015

Filed:

Dec 20, 2013

Appl. No.:

14/137345

Inventors:

- Irvine CA, US
Avi KLIGER - Ramat Gan, IL
Anatoli SHINDLER - Qiryat Ono, IL
Bazhong SHEN - Irvine CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04L 1/00
H04B 1/10

US Classification:

375341

Abstract:

The present disclosure is directed to a system and method for detecting burst noise. The system and method are described in the exemplary context of a cable modem system and can be used in such a system to specifically detect upstream burst noise. Once detected, the system and method can adjust the upstream receiver that receives data corrupted by the upstream burst noise to reduce the potentially deleterious effects that the burst noise can have on, for example, the packet error rate and/or data rate of the upstream receiver.